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XCV50E - Virtex-e Field Programmable Gate Array

Download the XCV50E datasheet PDF. This datasheet also covers the XCV50E-6CS144C variant, as both devices belong to the same virtex-e field programmable gate array family and are provided as variant models within a single manufacturer datasheet.

Description

The Virtex-E FPGA family delivers high-performance, high-capacity programmable logic solutions.

Dramatic increases in silicon efficiency result from optimizing the new architecture for place-and-route efficiency and exploiting an aggressive 6-layer metal 0.18 µm CMOS process.

Features

  • Fast, High-Density 1.8 V FPGA Family - Densities from 58 k to 4 M system gates - 130 MHz internal performance (four LUT levels) - Designed for low-power operation - PCI compliant 3.3 V, 32/64-bit, 33/ 66-MHz Highly Flexible SelectI/O+™ Technology - Supports 20 high-performance interface standards - Up to 804 singled-ended I/Os or 344 differential I/O pairs for an aggregate bandwidth of > 100 Gb/s Differential Signalling Support - LVDS (622 Mb/s), BLVDS (Bus LVDS), LVPECL - Differential.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (XCV50E-6CS144C_Xilinx.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer

Other Datasheets by Xilinx (now AMD)

Part Number Description
XCV50 Virtex Field Programmable Gate Array
XCV100 Virtex Field Programmable Gate Array
XCV1000E 1.8V Field Programmable Gate Arrays
XCV100E 1.8V Field Programmable Gate Arrays
XCV150 Virtex Field Programmable Gate Array

Full PDF Text Transcription

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www.DataSheet4U.com 0 R Virtex™-E 1.8 V Field Programmable Gate Arrays 0 0 DS022-1 (v2.3) July 17, 2002 Production Product Specification Features • Fast, High-Density 1.8 V FPGA Family - Densities from 58 k to 4 M system gates - 130 MHz internal performance (four LUT levels) - Designed for low-power operation - PCI compliant 3.
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