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W981616AH - 512K x 2 BANKS x 16-BIT SDRAM

General Description

W981616AH is a high-speed synchronous dynamic random access memory (SDRAM), organized as 512K words × 2 banks × 16 bits.

Using pipelined architecture and 0.20 µm process technology, W981616AH delivers a data bandwidth of up to 332M bytes per second (-6).

Key Features

  • 3.3V ±0.3V power supply.
  • Up to 166 MHz clock frequency.
  • 524,288 words x 2 banks x 16 bits organization.
  • Auto Refresh and Self Refresh.
  • CAS latency: 2 and 3.
  • Burst Length: 1, 2, 4, 8, and full page.
  • Burst read, Single Write Mode.
  • Byte data controlled by UDQM and LDQM.
  • Auto-precharge and controlled precharge.
  • 4K refresh cycles/64 mS.
  • Interface: LVTTL.
  • Packaged in 50-pin, 400 mil TSOP II P.

📥 Download Datasheet

Datasheet Details

Part number W981616AH
Manufacturer Winbond
File Size 1.24 MB
Description 512K x 2 BANKS x 16-BIT SDRAM
Datasheet download datasheet W981616AH Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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W981616AH 512K × 2 BANKS × 16 BITS SDRAM GENERAL DESCRIPTION W981616AH is a high-speed synchronous dynamic random access memory (SDRAM), organized as 512K words × 2 banks × 16 bits. Using pipelined architecture and 0.20 µm process technology, W981616AH delivers a data bandwidth of up to 332M bytes per second (-6). For different applications the W981616AH is sorted into the following speed grades: -6, -7, and -8. Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be accessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE command. Column addresses are automatically generated by the SDRAM internal counter in burst operation. Random column read is also possible by providing its address at each clock cycle.