VSC8162 Datasheet PDF (2.488 Gbit/sec SONET/SDH 1:16 Demux) | Download Vitesse Semiconductor VSC8162

VSC8162 - 2.488 Gbit/sec SONET/SDH 1:16 Demux

Datasheet Summary

Description

The VSC8162 combines a clock recovery unit (CRU) with a 1:16 demultiplexer on a single chip to directly generate 16-bit wide data from an incoming 2.488Gb/s NRZ data stream.

An on-chip Phase Locked Loop (PLL) generates a 2.488GHz clock which remains phase locked to the incoming data.

Features

2.488Gb/s 1:16 Demux with Integrated Clock and Data Recovery.
Recovered Clock and Data Available.
Monolithic Phase Locked Loop.
Digitally Adjustable Serial Data Sampling Point.
Differential Low Speed Outputs.
Differential/Single-ended Reference Clock.
Loss of Lock Detection.
Meets SONET OC-48 and SDH STM-16 Jitter Tolerance Requirements General.

Datasheet Details

Part number	VSC8162
Manufacturer	Vitesse Semiconductor
File Size	151.17 KB
Description	2.488 Gbit/sec SONET/SDH 1:16 Demux
Datasheet	VSC8162 Datasheet
Additional preview pages of the VSC8162 datasheet.

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Full PDF Text Transcription

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VITESSE SEMICONDUCTOR CORPORATION Advance Product Information VSC8162 2.488 Gbit/sec SONET/SDH 1:16 Demux with Clock Recovery Features • 2.488Gb/s 1:16 Demux with Integrated Clock and Data Recovery • Recovered Clock and Data Available • Monolithic Phase Locked Loop • Digitally Adjustable Serial Data Sampling Point • Differential Low Speed Outputs • Differential/Single-ended Reference Clock • Loss of Lock Detection • Meets SONET OC-48 and SDH STM-16 Jitter Tolerance Requirements General Description The VSC8162 combines a clock recovery unit (CRU) with a 1:16 demultiplexer on a single chip to directly generate 16-bit wide data from an incoming 2.488Gb/s NRZ data stream. An on-chip Phase Locked Loop (PLL) generates a 2.488GHz clock which remains phase locked to the incoming data.

Published: Feb 2, 2017 |