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VG2617405F - CMOS DRAM

Description

The device CMOS Dynamic RAM organized as 4,194,304 words x 4 bits with extended data out access mode.

It is fabricated with an advanced submicron CMOS technology and designed to operate from a single 5V only or 3.3V oniy power supply.

Features

  • Single 5V( ± 10 %) or 3.3V(3.15V~3.6V) only power supply.
  • High speed tRAC access time: 50/60ns.
  • Extended - data - out(EDO) page mode access.
  • I/O level: TTL compatible (Vcc = 5V) LVTTL compatible (Vcc = 3.3V).
  • 4 refresh modes: - RAS only refresh - CAS - before - RAS refresh - Hidden refresh - Self-refresh.
  • Refresh interval: - Self-refresh: 2048 cycles.
  • JEDEC standard pinout: 26/24-pin plastic SOJ and TSOPII. DataSheet4U. com DataShe.

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Datasheet Details

Part number VG2617405F
Manufacturer Vanguard Microelectronics Limited
File Size 630.49 KB
Description CMOS DRAM
Datasheet download datasheet VG2617405F Datasheet

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Full PDF Text Transcription

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www.DataSheet4U.com VIS Description VG26(V)(S)17405F 4,194,304 x 4 - Bit CMOS Dynamic RAM The device CMOS Dynamic RAM organized as 4,194,304 words x 4 bits with extended data out access mode. It is fabricated with an advanced submicron CMOS technology and designed to operate from a single 5V only or 3.3V oniy power supply. Low voltage operation is more suitable to be used on battery backup, portable electronic application. Self-Refresh is supported and CBR cycles are being performed. lt is packaged in JEDEC standard 26/24-pin plastic SOJ or TSOPII. Features • Single 5V( ± 10 %) or 3.3V(3.15V~3.6V) only power supply • High speed tRAC access time: 50/60ns • Extended - data - out(EDO) page mode access • I/O level: TTL compatible (Vcc = 5V) LVTTL compatible (Vcc = 3.
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