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VT83205 - 3.3V Low Phase Noise VCXO

Description

The Vaishali VT83205 is a single-chip, integrated VCXO and Phase Locked Loop (PLL) clock synthesizer.

The device uses the VCXO and an analog Phase-Locked Loop (PLL) to accept a 10 MHz to 14.318 MHz, 30pF (pull range of 200 ppm) crystal input, in order to produce either one or two output clocks.

Features

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  • = 3.3V supply operation Packaged in 16-pin SOIC & QSOP packages. Replaces separate VCXO and multiplier Uses inexpensive pullable crystal.
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  • = On-chip VCXO with 200 ppm pull range (±100 ppm) 5V-tolerant control inputs Zero ppm synthesis error in both clocks Figure 1. Functional Block Diagram VDD1 VDD2 VIN X2 Load Cap Control Output Buffer osc Low Phase Noise PLL Output Buffer X1 S2:S0 OE CLK2 CLK1 10-14 MHz Pullable Cryst.

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Datasheet Details

Part number VT83205
Manufacturer Vaishali Semiconductor
File Size 79.30 KB
Description 3.3V Low Phase Noise VCXO
Datasheet download datasheet VT83205 Datasheet

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Other Datasheets by Vaishali Semiconductor

Part Number Description
VT83201 3.3V Low Phase Noise VCXO
VT83027 27MHz/ 3.3V VCXO

Full PDF Text Transcription

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VT83205 3.3V Low Phase Noise VCXO (Voltage-Controlled Crystal Oscillator) and PLL Clock Synthesizer Applications •= •= Telecom switching Set-top boxes •= •= HDTV MPEG Video clock source General Description The Vaishali VT83205 is a single-chip, integrated VCXO and Phase Locked Loop (PLL) clock synthesizer. The device uses the VCXO and an analog Phase-Locked Loop (PLL) to accept a 10 MHz to 14.318 MHz, 30pF (pull range of 200 ppm) crystal input, in order to produce either one or two output clocks. A 0 to 3V control signal is used to fine tune the output clock frequency in the ±100ppm range. Select inputs SO:S2 are used for frequency and output selection. Features •= •= •= •= 3.3V supply operation Packaged in 16-pin SOIC & QSOP packages.
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