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TC74VHC21FN - DUAL 4-INPUT AND GATE

Key Features

  • High speed: tpd = 3.3 ns (typ. ) at VCC = 5 V.
  • Low power dissipation: ICC = 2 μA (max) at Ta = 25°C.
  • High noise immunity: VNIH = VNIL = 28% VCC (min).
  • Power down protection is provided on all inputs.
  • Balanced propagation delays: tpLH ≈ tpHL.
  • Wide operating voltage range: VCC (opr) = 2 to 5.5 V.
  • Pin and function compatible with 74ALS21 Note: xxxFN (JEDEC SOP) is not available in Japan. TC74VHC21F TC74VHC21FN TC74VHC21FT TC74VHC21FK.

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Full PDF Text Transcription for TC74VHC21FN (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for TC74VHC21FN. For precise diagrams, and layout, please refer to the original PDF.

TC74VHC21F/FN/FT/FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHC21F,TC74VHC21FN,TC74VHC21FT,TC74VHC21FK Dual 4-Input AND Gate The TC74VHC21 is an ad...

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N,TC74VHC21FT,TC74VHC21FK Dual 4-Input AND Gate The TC74VHC21 is an advanced high speed CMOS 4-INPUT AND GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The internal circuit is composed of 4 stages including a buffer output, which provide high noise immunity and stable output. An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery

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