Datasheet4U Logo Datasheet4U.com

CXL5520M - CMOS-CCD Baseband 1H Delay Line

Description

CXL5520 is a CMOS-CCD baseband 1H delay line designed for TV signal processing.

Features

  • Single 5V power supply.
  • Low power consumption.
  • Built-in line locked PLL circuit.
  • Built-in 2 comb filters (Addition of delayed and non-delayed output signal. ).
  • Built-in peripheral circuits Absolute Maximum Ratings (Ta = 25°C).
  • Supply voltage VDD +6 V.
  • Operating temperature Topr.
  • 10 to +60 °C.
  • Storage temperature Tstg.
  • 55 to +150 °C.
  • Allowable power dissipation PD CXL5520M 400 mW CXL5520P 800 mW Recom.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
CXL02TG3 HIGH PERFORMANCE ACCELEROMETER ACEINNA
CXL04GP1 GENERAL PURPOSE ACCELEROMETER ACEINNA
CXL04GP3 GENERAL PURPOSE ACCELEROMETER ACEINNA
CXL10GP1 GENERAL PURPOSE ACCELEROMETER ACEINNA
CXL10GP3 GENERAL PURPOSE ACCELEROMETER ACEINNA

Other Datasheets by Sony Semiconductor Solutions

Part Number Description
CXL5520P CMOS-CCD Baseband 1H Delay Line
CXL5502M CMOS-CCD 1H Delay Line for NTSC
CXL5502N CMOS-CCD 1H Delay Line for NTSC
CXL5502P CMOS-CCD 1H Delay Line for NTSC
CXL5504M CMOS-CCD 1H Delay Line for NTSC

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
CXL5520M/P CMOS-CCD Baseband 1H Delay Line Description CXL5520 is a CMOS-CCD baseband 1H delay line designed for TV signal processing. Features • Single 5V power supply • Low power consumption • Built-in line locked PLL circuit • Built-in 2 comb filters (Addition of delayed and non-delayed output signal.) • Built-in peripheral circuits Absolute Maximum Ratings (Ta = 25°C) • Supply voltage VDD +6 V • Operating temperature Topr –10 to +60 °C • Storage temperature Tstg –55 to +150 °C • Allowable power dissipation PD CXL5520M 400 mW CXL5520P 800 mW Recommended Operating Condition (Ta = 25°C) Supply voltage VDD 5V ± 5% Recommended Clock Condition (Ta = 25°C) • Top pulse voltage VCLK 3 to 7 V • Frequency fCLK 15.625 kHz • Input clock waveform Sandcastle pulse Pin Description Pin No.
Published: |