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Si5338
I 2 C - P R O G R A M M A B LE A N Y - F R E Q U E N C Y, A N Y -O UTPU T Q U A D C L OC K G E N E R A T O R
Features
CLK0A
CLK0B
VDD
VDDO0
20
Low power MultiSynth™ technology enables independent, any-frequency synthesis on four differential output drivers Highly-configurable output drivers with up to four differential outputs, eight single-ended clock outputs, or a combination of both Low phase jitter of 0.7 ps RMS typ High precision synthesis allows true zero ppm frequency accuracy on all outputs Flexible input reference: External crystal: 8 to 30 MHz CMOS input: 5 to 200 MHz SSTL/HSTL input: 5 to 350 MHz Differential input: 5 to 710 MHz Independently configurable outputs support any frequency or format: LVPECL/LVDS: 0.