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SDA5648X - Decoder for Program Delivery Control and Video Program System PDC / VPS Decoder

Description

The CMOS circuit SDA 5648 is intended for use in video cassette recorders to retrieve control data of the PDC system from the data lines broadcast during the vertical blanking interval of a standard video signal.

Features

  • q Single-chip receiver for PDC data, broadcast either q q q q q q q q q q q.
  • in Broadcast Data Service Packet (BDSP) 8/30/2 according to CCIR teletext system B, or.
  • in dedicated line no. 16 of the vertical blanking interval (VPS) Reception of Unified Date and Time (UDT) broadcast in BDSP 8/30/1 Low external components count On-chip data and sync slicer I2C-Bus interface for communication with external microcontroller Selection of PDC/VPS operating mode software controlled by.

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Datasheet Details

Part number SDA5648X
Manufacturer Siemens
File Size 472.62 KB
Description Decoder for Program Delivery Control and Video Program System PDC / VPS Decoder
Datasheet download datasheet SDA5648X Datasheet
Additional preview pages of the SDA5648X datasheet.

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Full PDF Text Transcription

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Decoder for Program Delivery Control and Video Program System PDC / VPS Decoder SDA 5648 SDA 5648X CMOS IC Features q Single-chip receiver for PDC data, broadcast either q q q q q q q q q q q – in Broadcast Data Service Packet (BDSP) 8/30/2 according to CCIR teletext system B, or – in dedicated line no. 16 of the vertical blanking interval (VPS) Reception of Unified Date and Time (UDT) broadcast in BDSP 8/30/1 Low external components count On-chip data and sync slicer I2C-Bus interface for communication with external microcontroller Selection of PDC/VPS operating mode software controlled by I2C-Bus register Pin and software compatible to VPS Decoder SDA 5642 Supply voltage: 5 V ± 10 % Video input signal level: 0.7 Vpp to 1.
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