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HYM364035S - 4M x 36-Bit EDO-DRAM Module

Description

DRAM Module (access time 60 ns) DRAM Module (access time 60 ns) Semiconductor Group 2 HYM 364035S/GS-60 4M × 36-Bit EDO-Module Pin Configuration (top view) Pin Names A0-A10 DQ0-DQ35 CAS0 - CAS3 RAS0, RAS2 WE Address Inputs for HYM 364035S/GS Data Input/Output Column Address Strobe Row Address S

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HYM364035GS-60 4M x 36-Bit EDO-DRAM Module
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Full PDF Text Transcription

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4M × 36-Bit EDO-DRAM Module HYM 364035S/GS-60 Advanced Information • • 4 194 304 words by 36-Bit organization Fast access and cycle time 60 ns RAS access time 15 ns CAS access time 104 ns cycle time Hyper page mode (EDO) capability 25 ns cycle time Single + 5 V (± 10 %) supply Low power dissipation max. 7260 mW active CMOS – 66 mW standby TTL – 132 mW standby CAS-before-RAS refresh RAS-only-refresh Hidden-refresh 12 decoupling capacitors mounted on substrate All inputs, outputs and clocks fully TTL compatible 72 pin Single in-Line Memory Module (L-SIM-72) with 22.
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