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HYB514175BJ-60 - 256k x 16-Bit EDO-DRAM

Description

N.C.

Features

  • include single + 5 V (± 10 %) power supply, direct interfacing with high performance logic device families such as Schottky TTL. Ordering Information Type HYB 514175BJ-50 HYB 514175BJ-55 HYB 514175BJ-60 Truth Table RAS H L L L L L L L L LCAS H H L H L L H L L UCAS H H H L L H L L L WE H H H H H L L L H OE H H L L L H H H H I/O1 - I/O8 High-Z High-Z Dout High-Z Dout Din Don't care Din High-Z I/O9 - I/O16 High-Z High-Z High-Z Dout Dout Don't care Din Din High-Z Operation Standby Refresh Lower byte.

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Full PDF Text Transcription

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256k × 16-Bit EDO-DRAM HYB 514175BJ-50/-55/-60 Advanced Information • • • • 262 144 words by 16-bit organization 0 to 70 °C operating temperature Fast access and cycle time RAS access time: 50 ns (-50 version) 55 ns (-55 version) 60 ns (-60 version) CAS access time: 13 ns (-50 & -55 version) 15 ns (-60 version) Cycle time: 89 ns (-50 version) 94 ns (-55 version) 104 ns (-60 version) Hyper page mode (EDO) cycle time 20 ns (-50 & -55 version) 25 ns (-60 version) High data rate 50 MHz (-50 & -55 version) 40 MHz (-60 version) Single + 5 V (± 10 %) supply with a built-in VBB generator • Low Power dissipation max. 1100 mW active (-50 version) max. 1045 mW active (-55 version) max. 935 mW active (-60 version) • Standby power dissipation 11 mW standby (TTL) 5.5 mW max.
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