Datasheet4U Logo Datasheet4U.com

HYB39S256800 - (HYB39S256xxx) 256 MBit Synchronous DRAM

Download the HYB39S256800 datasheet PDF. This datasheet also covers the HYB39S256400 variant, as both devices belong to the same (hyb39s256xxx) 256 mbit synchronous dram family and are provided as variant models within a single manufacturer datasheet.

Description

HYB 39S256400T-8B on request HYB 39S256400T-10 on request HYB 39S256800T-8 on request HYB 39S256800T-8B on request HYB 39S256800T-10 on request HYB 39S256800T-8 www.DataSheet4U.com on request HYB 39S256800T-8B on request HYB 39S256800T-10 on request Pin Description and Pinouts CLK CKE CS RAS C

Features

  • signals CS, RAS, CAS, WE, and DQM at the positive edge of the clock. The following list shows the truth table fo.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (HYB39S256400_SiemensSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
HYB39S256800CT (HYB39S256xxxCT) 256 MBit Synchronous DRAM Infineon Technologies
HYB39S256800CTL (HYB39S256xxxCT) 256 MBit Synchronous DRAM Infineon Technologies
HYB39S256800DC (HYB39S256xxxD) 256 MBit Synchronous DRAM Infineon Technologies
HYB39S256800DCL (HYB39S256xxxD) 256 MBit Synchronous DRAM Infineon Technologies
HYB39S256800DT (HYB39S256xxxD) 256 MBit Synchronous DRAM Infineon Technologies

Other Datasheets by Siemens Semiconductor Group (now Infineon)

Part Number Description
HYB39S256800T (HYB39S256xxx) 256 MBit Synchronous DRAM
HYB39S256160 (HYB39S256xxx) 256 MBit Synchronous DRAM
HYB39S256160T (HYB39S256xxx) 256 MBit Synchronous DRAM
HYB39S256400 (HYB39S256xxx) 256 MBit Synchronous DRAM
HYB39S256400T (HYB39S256xxx) 256 MBit Synchronous DRAM

Full PDF Text Transcription

Click to expand full text
256 MBit Synchronous DRAM HYB 39S256400/800/160T Preliminary Information • High Performance: -8 -8B 100 10 6 12 7 -10 100 10 7 15 8 Units MHz ns ns ns ns • Multiple Burst Read with Single Write Operation • Automatic and Controlled Precharge Command • Data Mask for Read/Write control (× 4, × 8) • Data Mask for byte control (× 16) • Auto Refresh (CBR) and Self Refresh • Suspend Mode and Power Down Mode • 8192 refresh cycles/64 ms 7,8 µ • Random Column Address every CLK (1-N Rule) • Single 3.3 V ± 0.3 V Power Supply • LVTTL Interface versions • Plastic Packages: P-TSOPII-54 400mil width (× 4, × 8, × 16) • -8 part for PC100 2-2-2 operation -8B part for PC100 3-2-3 operation -10 part for PC66 2-2-2 operation fCK tCK3 tAC3 tCK2 tAC2 • • • • www.DataSheet4U.
Published: |