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SMUN5215DW - NPN Multi-Chip Built-in Resistors Transistor

This page provides the datasheet information for the SMUN5215DW, a member of the SMUN5211DW NPN Multi-Chip Built-in Resistors Transistor family.

Datasheet Summary

Features

  • TS) Figure 14. Output Capacitance 50 0.001 0 12 34 56 78 9 10 V in , INPUT.

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Datasheet preview – SMUN5215DW

Datasheet Details

Part number SMUN5215DW
Manufacturer SeCoS
File Size 329.13 KB
Description NPN Multi-Chip Built-in Resistors Transistor
Datasheet download datasheet SMUN5215DW Datasheet
Additional preview pages of the SMUN5215DW datasheet.

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Full PDF Text Transcription

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Elektronische Bauelemente SMUN52XXDW NPN Multi-Chip Built-in Resistors Transistor The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base–emitter resistor. These digital transistors are designed to replace a single device and its external resistor bias network. The BRT eliminates these individual components by integrating them into a single device. In the SMUN5211DW series, two BRT devices are housed in the SOT–363 package which is ideal for low power surface mount applications where board space is at a premium.
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