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LC89512W - CD-ROM Error Correction LSI

Features

  • Support for double-speed drives at an operating frequency of 16.9344 MHz Either SRAM (120 ns), DRAM (80 ns) or pseudo SRAM (85 ns) can be used.
  • Support for quad-speed drives at an operating frequency of 33.8688 MHz SRAM (70 ns) must be used.
  • Built-in SCSI interface with built-in 48 mA sink buffer (Only the TARGET function is supported. ).
  • Built-in 12-byte output FIFO for sub-CPU to host computer data transmission.
  • Built-in 12-byte input FIFO for hos.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Ordering number : EN*4852B CMOS LSI LC89512W CD-ROM Error Correction LSI with Built-In SCSI Interface Preliminary Overview The LC89512W integrates a real-time error correction circuit and a SCSI interface in a single chip. Package Dimensions unit: mm 3181A-SQFP100 [LC89512W] Functions • CD-ROM error correction function, subcode readout function, SCSI interface Features • Support for double-speed drives at an operating frequency of 16.9344 MHz Either SRAM (120 ns), DRAM (80 ns) or pseudo SRAM (85 ns) can be used. • Support for quad-speed drives at an operating frequency of 33.8688 MHz SRAM (70 ns) must be used. • Built-in SCSI interface with built-in 48 mA sink buffer (Only the TARGET function is supported.
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