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LC35256DT-10 - Dual Control Pins: OE and CE 256K (32768-word X 8-bit) SRAM

Features

  • Supply voltage range: 2.7 to 5.5 V.
  • 5-V operation: 5.0 V±10%.
  • 3-V operation: 2.7 to 3.6 V.
  • Access times.
  • 5-V operation LC35256DM, DT-70: 70 ns (max) LC35256D, DM, DT-10: 100 ns (max).
  • 3-V operation LC35256DM, DT-70: 200 ns (max) LC35256D, DM, DT-10: 500 ns (max).
  • Standby current.
  • 5-V operation: 1.0 µA (Ta ≤ 60°C), 5.0 µA (Ta ≤ 85°C).
  • 3-V operation: 0.8 µA (Ta ≤ 60°C), 4.0 µA (Ta ≤ 85°C).
  • Operating temperat.

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Ordering number : EN5823 CMOS IC LC35256D-10, LC35256DM, DT-70/10 Dual Control Pins: OE and CE 256K (32768-word × 8-bit) SRAM Overview The LC35256D, LC35256DM, and LC35256DT are 32768-word × 8-bit asynchronous silicon gate CMOS static RAMs. These devices use a 6-transistor full CMOS memory cell, and feature low-voltage operation, low current drain, and an ultralow standby current. They provide two control signal inputs: an OE input for highspeed access and a chip select (CE) input for device selection and low power operating mode. This makes these devices optimal for systems that require low power or battery backup, and they allow memory to be expanded easily. Their ultralow standby current allows capacitorbased backup to be used as well.
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