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S3C72G9 - SAM47 INSTRUCTION SET

Features

  • of the SAM47 instruction set include:.
  • 1-byte referencing of long instructions (REF instruction).
  • Redundant instruction reduction (string effect).
  • Skip feature for ADC and SBC instructions Instruction operands conform to the operand format defined for each instruction. Several instructions have multiple operand formats. Predefined values or labels can be used as instruction operands when addressing immediate data. Many of the symbols for specific registers and flags ma.

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Other Datasheets by Samsung Semiconductor

Part Number Description
S3C72G9 The S3C72G9 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrangeable M
S3C7235 The S3C7238/C7235 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrange
S3C7238 The S3C7238/C7235 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrange
S3C7281 The S3C7281 is a SAM48 core-based 4-bit CMOS single-chip microcontroller. It is built around the SAM48 core CPU and contains ROM/ RAM.
S3C7295 The S3C7295 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrangeable M

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
             The SAM47 instruction set is specifically designed to support the large register files typically founded in most KS57-series microcontrollers. The SAM47 instruction set includes 1-bit, 4-bit, and 8-bit instructions for data manipulation, logical and arithmetic operations, program control, and CPU control. I/O instructions for peripheral hardware devices are flexible and easy to use. Symbolic hardware names can be substituted as the instruction operand in place of the actual address.
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