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K6R4008V1C - 512Kx8 Bit High Speed Static

General Description

The K6R4008V1C is a 4,194,304-bit high-speed Static Random Access Memory organized as 524,288 words by 8 bits.

The K6R4008V1C uses 8 common input and output lines and has an output enable pin which operates faster than address access time at read cycle.

Key Features

  • Fast Access Time 10,12,15ns(Max. ).
  • Low Power Dissipation Standby (TTL) : 60mA(Max. ) (CMOS) : 10mA(Max. ) 1.2mA(Max. ) L-Ver. only Operating K6R4008V1C-10 : 155mA(Max. ) K6R4008V1C-12 : 145mA(Max. ) K6R4008V1C-15 : 135mA(Max. ).
  • Single 3.3±0.3V Power Supply.
  • TTL Compatible Inputs and Outputs.
  • Fully Static Operation - No Clock or Refresh required.
  • Three State Outputs.
  • 2V Minimum Data Retention : L-Ver. only.
  • Center Power/Ground Pi.

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Full PDF Text Transcription for K6R4008V1C (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for K6R4008V1C. For precise diagrams, and layout, please refer to the original PDF.

www.DataSheet4U.com PRELIMINARY CMOS SRAM K6R4008V1C-C/C-L, K6R4008V1C-I/C-P 3Document Title 512Kx8 Bit High Speed Static RAM(3.3V Operating). Operated at Commercial and ...

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Bit High Speed Static RAM(3.3V Operating). Operated at Commercial and Industrial Temperature Ranges. Revision History Rev No. Rev. 0.0 Rev. 1.0 History Initial release with Preliminary. 1.1 Removed Low power Version. 1.2 Removed Data Retention Characteristics. 1.3 Changed ISB1 to 20mA Relax D.C parameters. Item ICC 12ns 15ns 20ns Previous 160mA 155mA 150mA Current 195mA 190mA 185mA Final Draft Data Feb. 12. 1999 Mar. 29. 1999 Remark Preliminary Preliminary Rev. 2.0 Aug. 19. 1999 Preliminary Rev. 3.0 3.1 Delete Preliminary 3.2 Update D.C parameters and 10ns part. ICC 195mA 190mA 185mA Previous Isb 70mA Isb1 20mA ICC 155mA 1

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