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K6R4004V1D - 1Mx4 Bit High Speed Static RAM

General Description

The K6R4004V1D is a 4,194,304-bit high-speed Static Random Access Memory organized as 1,048,576 words by 4 bits.

The K6R4004V1D uses 4 common input and output lines and has an output enable pin which operates faster than address access time at read cycle.

Key Features

  • Fast Access Time 8,10ns(Max. ).
  • Low Power Dissipation Standby (TTL) :20mA(Max. ) (CMOS) : 5mA(Max. ) Operating K6R4004V1D-08: 80mA(Max. ) K6R4004V1D-10: 65mA(Max. ).
  • Single 3.3±0.3V Power Supply.
  • TTL Compatible Inputs and Outputs.
  • Fully Static Operation - No Clock or Refresh required.
  • Three State Outputs.
  • Center Power/Ground Pin Configuration.
  • Standard Pin Configuration K6R4004V1D-J: 32-SOJ-400 K6R4004V1D-K: 32-SOJ-400(Lead-Free.

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Full PDF Text Transcription for K6R4004V1D (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for K6R4004V1D. For precise diagrams, and layout, please refer to the original PDF.

K6R4004V1D Document Title 1Mx4 Bit High Speed Static RAM(3.3V Operating). Operated at Commercial and Industrial Temperature Ranges. PRELIMINARY CMOS SRAM Revision History...

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Industrial Temperature Ranges. PRELIMINARY CMOS SRAM Revision History Rev No. Rev. 0.0 Rev. 0.1 Rev. 1.0 History Initial release with Preliminary. Add Low Ver. Change Icc, Isb and Isb1 Item ICC(Commercial) 8ns 10ns 12ns 15ns 8ns 10ns 12ns 15ns Previous 110mA 90mA 80mA 70mA 130mA 115mA 100mA 85mA 30mA 0.5mA Current 80mA 65mA 55mA 45mA 100mA 85mA 75mA 65mA 20mA 1.2mA Nov.23. 2001 Preliminary Draft Data Aug. 20. 2001 Sep. 19. 2001 Nov. 3. 2001 Remark Preliminary Preliminary Preliminary ICC(Industrial) ISB ISB1(L-ver.) Rev. 0.3 1. Correct AC parameters : Read & Write Cycle mA 2. Delete Low Ver. 3. Delete Data Retention Charac

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