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K4S56163LC - 16Mx16 Mobile SDRAM 54CSP

General Description

The K4S56163LC is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 4,196,304 words by 16 bits, fabricated with SAMSUNG's high performance CMOS technology.

Key Features

  • 2.5V power supply.
  • LVCMOS compatible with multiplexed address.
  • Four banks operation.
  • MRS cycle with address key programs. -. CAS latency (1 & 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave).
  • EMRS cycle with address key programs.
  • All inputs are sampled at the positive going edge of the system clock.
  • Burst read single-bit write operation.
  • Special Function Support. -. PASR (Part.

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Full PDF Text Transcription for K4S56163LC (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for K4S56163LC. For precise diagrams, and layout, please refer to the original PDF.

K4S56163LC-R(B)F/R CMOS SDRAM 16Mx16 Mobile SDRAM 54CSP (VDD/VDDQ 2.5V/1.8V or 2.5V/2.5V, TCSR & PASR) Revision 1.4 December 2002 Rev. 1.4 Dec. 2002 K4S56163LC-R(B)F/R 4M...

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R) Revision 1.4 December 2002 Rev. 1.4 Dec. 2002 K4S56163LC-R(B)F/R 4M x 16Bit x 4 Banks Mobile SDRAM in 54CSP FEATURES • 2.5V power supply. • LVCMOS compatible with multiplexed address. • Four banks operation. • MRS cycle with address key programs. -. CAS latency (1 & 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave). • EMRS cycle with address key programs. • All inputs are sampled at the positive going edge of the system clock. • Burst read single-bit write operation. • Special Function Support. -. PASR (Partial Array Self Refresh). -. TCSR (Temperature Compensated Self Refresh). •

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