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STM32F101x6 - (STM32F101xx) advanced ARM-based 32-bit MCU

Download the STM32F101x6 datasheet PDF. This datasheet also covers the STM32F101C6 variant, as both devices belong to the same (stm32f101xx) advanced arm-based 32-bit mcu family and are provided as variant models within a single manufacturer datasheet.

General Description

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7 Overview 8

Key Features

  • Core: ARM 32-bit Cortex™-M3 CPU.
  • 36 MHz, 45 DMIPS with 1.25 DMIPS/MHz.
  • Single-cycle multiplication and hardware division.
  • Nested interrupt controller with 43 maskable interrupt channels.
  • Interrupt processing (down to 6 CPU cycles) with tail chaining Memories.
  • 32-to-128 Kbytes of Flash memory.
  • 6-to-16 Kbytes of SRAM Clock, reset and supply management.
  • 2.0 to 3.6 V.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (STM32F101C6_STMicroelectronics.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by STMicroelectronics

Part Number Description
STM32F101x8 (STM32F101xx) advanced ARM-based 32-bit MCU
STM32F101xB (STM32F101xx) advanced ARM-based 32-bit MCU
STM32F101C4 32 bit MCU
STM32F101C6 32 bit MCU
STM32F101C8 32-bit MCU

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com STM32F101x6 STM32F101x8 STM32F101xB Access line, advanced ARM-based 32-bit MCU with Flash memory, six 16-bit timers, ADC and seven communication interfaces Preliminary Data Features ■ Core: ARM 32-bit Cortex™-M3 CPU – 36 MHz, 45 DMIPS with 1.25 DMIPS/MHz – Single-cycle multiplication and hardware division – Nested interrupt controller with 43 maskable interrupt channels – Interrupt processing (down to 6 CPU cycles) with tail chaining Memories – 32-to-128 Kbytes of Flash memory – 6-to-16 Kbytes of SRAM Clock, reset and supply management – 2.0 to 3.