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STA5630 - Low power GPS RF front-end

General Description

The chip is a fully integrated RF front-end able to down-convert either the GPS L1 signal from 1575.42 MHz to 4.092 MHz.

The STA5630 embeds high performance LNA minimizing external component count.

The chip uses state of the art CMOS 65 nm technology.

Key Features

  • Integrated LNA Low power consumption (< 25 mW) 1.8 V supply voltage GPS and Galileo compliant Minimum external components Serial interface 3 bits A/D converter CMOS 65 nm technology 2 kV HBM ESD protected Standard QFN-32 package VFQFPN32.

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet.co.kr STA5630 Low power GPS RF front-end Data brief Features ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Integrated LNA Low power consumption (< 25 mW) 1.8 V supply voltage GPS and Galileo compliant Minimum external components Serial interface 3 bits A/D converter CMOS 65 nm technology 2 kV HBM ESD protected Standard QFN-32 package VFQFPN32 Description The chip is a fully integrated RF front-end able to down-convert either the GPS L1 signal from 1575.42 MHz to 4.092 MHz. The STA5630 embeds high performance LNA minimizing external component count. The chip uses state of the art CMOS 65 nm technology. A 3-bit ADC converts the IF signal to Sign (SIGN) and Magnitude (MAG0 and MAG1). The magnitude bits are internally integrated in order to control the variable gain amplifiers.