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SPEAr600 - Embedded MPU

Description

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Features

  • and programmable LCD interface Datasheet.
  • production data Features.
  • Dual ARM926EJ-S core up to 333 MHz:.
  • Each with 16 Kbytes instruction cache + 16 Kbytes data cache.
  • High performance 8-channel DMA.
  • Dynamic power saving features.
  • Up to 733 DMIPS.
  • Memory:.
  • External DRAM interface: 8/16-bit DDR1333 / DDR2 - 666.
  • 32 Kbytes BootROM / 8 Kbytes internal SRAM.
  • Flexible static memory controller (FSMC) supporting parallel NAND Flash m.

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Full PDF Text Transcription

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SPEAr600 Embedded MPU with dual ARM926 core, flexible memory support, powerful connectivity features and programmable LCD interface Datasheet − production data Features ■ Dual ARM926EJ-S core up to 333 MHz: – Each with 16 Kbytes instruction cache + 16 Kbytes data cache ■ High performance 8-channel DMA ■ Dynamic power saving features ■ Up to 733 DMIPS ■ Memory: – External DRAM interface: 8/16-bit DDR1333 / DDR2 - 666 – 32 Kbytes BootROM / 8 Kbytes internal SRAM – Flexible static memory controller (FSMC) supporting parallel NAND Flash memory interface, ONFI 1.0 support, internal 1-bit ECC or external 4-bit ECC – Serial NOR Flash Memory interface ■ Connectivity: – 2 x USB 2.0 Host – USB 2.
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