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SPC574S60E3 - 32-bit Power Architecture microcontroller

Description

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Features

  • AEC-Q100 qualified.
  • High performance e200z4d dual core.
  • 32-bit Power Architecture technology CPU.
  • Core frequency as high as 140 MHz.
  • Dual issue 5-stage pipeline in-order execution core.
  • Variable Length Encoding (VLE).
  • Core MPU.
  • Floating Point, End-to-End Error Correction.
  • 8 KB instruction cache with error detection code.
  • 32 KB local data RAM and 4 KB data cache along with 8 KB instruction cache.
  • 1.

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Full PDF Text Transcription

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SPC574S60E3, SPC574S64E3 32-bit Power Architecture microcontroller for automotive ASILD applications Datasheet - production data eTQFP100 (14 x 14 x 1.0 mm) Features • AEC-Q100 qualified • High performance e200z4d dual core – 32-bit Power Architecture technology CPU – Core frequency as high as 140 MHz – Dual issue 5-stage pipeline in-order execution core – Variable Length Encoding (VLE) – Core MPU – Floating Point, End-to-End Error Correction – 8 KB instruction cache with error detection code – 32 KB local data RAM and 4 KB data cache along with 8 KB instruction cache • 1600 KB (1.
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