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HCF4027B - DUAL-J-K MASTER-SLAVE FLIP-FLOP

Description

OF ”B” SERIES CMOS DEVICES”.

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Full PDF Text Transcription

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HCC/HCF4027B DUAL-J-K MASTER-SLAVE FLIP-FLOP . . . . . . . . SET-RESET CAPABILITY STATIC FLIP-FLOP OPERATION - RETAINS STATE INDEFINITELY WITH CLOCK LEVEL EITHER ”HIGH” OR ”LOW” MEDIUM SPEED OPERATION - 16MHz (typ. clock toggle rate at 10V) STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS QUIESCENT CURRENT SPECIFIED TO 20V FOR HCC DEVICE INPUT CURRENT OF 100nA AT 18V AND 25°C FOR HCC DEVICE 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC TEN0 TATIVE STANDARD N . 13A, ”STANDARD SPECIFICATIONS FOR DESCRIPTION OF ”B” SERIES CMOS DEVICES”.
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