The following content is an automatically extracted verbatim text
from the original manufacturer datasheet and is provided for reference purposes only.
View original datasheet text
®
74LVQ138
3 TO 8 LINE DECODER (INVERTING)
s s s
s
s
s
s s
s
s
s
HIGH SPEED: tPD = 5.5 ns (TYP.) at VCC = 3.3V COMPATIBLE WITH TTL OUTPUT LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.2 V (TYP.) at VCC = 3.3V 75Ω TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12 mA (MIN) PCI BUS LEVELS GUARANTEED AT 24mA BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 3.6V (1.2V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 138 IMPROVED LATCH-UP IMMUNITY
M1 (Micro Package)
T (TSSOP Package)
ORDER CODES : 74LVQ138M 74LVQ138T If the device is enabled, 3 binary select inputs (A, B and C) determine which one of the outputs will go low.