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STLVD112 - HIGH SPEED PROTECTION SWITCH

General Description

The STLVD112 is a low voltage differential to LVTTL signal converter with enhanced loop-back and crosspoint

Key Features

  • The synchronous design allows a phase alignment between a clock and its data; this means a better BER (Bit Error Rate) performance. The advanced 0.35µm technology makes the STLVD112 suitable for data rates up to 200Mbit. The main.

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STLVD111 PROGRAMMABLE LOW VOLTAGE 1:10 DIFFERENTIAL LVDS CLOCK DRIVER
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Full PDF Text Transcription (Reference)

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www.DataSheet4U.com STLVD112 HIGH SPEED PROTECTION SWITCH s s s s s 24mA CMOS OUTPUT DRIVE CURRENT LVTTL INPUT THRESHOLDS CONTROLLED SKEW BETWEEN DATA AND CLOCK SIGNALS LVDS INPUT-OUTPUT UP TO 155 MHZ IMPROVED LATCH-UP IMMUNITY UP TO 300mA DESCRIPTION The STLVD112 is a low voltage differential to LVTTL signal converter with enhanced loop-back and crosspoint features. The synchronous design allows a phase alignment between a clock and its data; this means a better BER (Bit Error Rate) performance. The advanced 0.35µm technology makes the STLVD112 suitable for data rates up to 200Mbit. The main application field is SDH/SONET telecom infrastructure. The STLVD112 flexible switch architecture makes it easy to implement multiple protection schemes in STM1 access systems.