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M74HC237 - 3 TO 8 LINE DECODER LATCH

General Description

- O teC2MOS technology.

) leWhen GL goes from low to high, the address t(s opresent at the select inputs (A, B, C) is stored in sthe latches.

As long as GL remains high no c baddress changes will be recognized.

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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M74HC237 3 TO 8 LINE DECODER LATCH s HIGH SPEED: tPD = 16ns (TYP.) at VCC = 6V s LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C s HIGH NOISE IMMUNITY: )VNIH = VNIL = 28 % VCC (MIN.) t(ss SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) ucs BALANCED PROPAGATION DELAYS: dtPLH ≅ tPHL ro )s WIDE OPERATING VOLTAGE RANGE: P t(sVCC (OPR) = 2V to 6V s PIN AND FUNCTION COMPATIBLE WITH lete uc74 SERIES 237 so rodDESCRIPTION b PThe M74HC237 is an high speed CMOS 3 TO 8 LINE DECODER fabricated with silicon gate - O teC2MOS technology. ) leWhen GL goes from low to high, the address t(s opresent at the select inputs (A, B, C) is stored in sthe latches. As long as GL remains high no c baddress changes will be recognized.