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X28HT010 - Byte Alterable EEPROM

Download the X28HT010 datasheet PDF. This datasheet also covers the X28C010 variant, as both devices belong to the same byte alterable eeprom family and are provided as variant models within a single manufacturer datasheet.

Features

  • the JEDEC approved pin out for byte-wide memories, compatible with industry standard EEPROMs. The X28C010/X28HT010 supports a 256-byte page write operation, effectively providing a 19µs/byte write cycle and enabling the entire memory to be typically written in less than 2.5 seconds. The X28C010/X28HT010 also features DATA Polling and Toggle Bit Polling, system software support schemes used to indicate the early completion of a write cycle. In addition, the X28C010/X28HT010 supports Software Data.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (X28C010-Renesas.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number X28HT010
Manufacturer Renesas
File Size 818.24 KB
Description Byte Alterable EEPROM
Datasheet download datasheet X28HT010 Datasheet

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Other Datasheets by Renesas

Part Number Description
X28HC256 Byte Alterable EEPROM
X28HC64 Byte Alterable EEPROM
X28C010 Byte Alterable EEPROM
X28C256 Byte Alterable EEPROM
X28C512 Byte Alterable EEPROM

Full PDF Text Transcription

Click to expand full text
X28C010, X28HT010 5V, Byte Alterable EEPROM NOT RECOMMENDED FOR NEW DESIGNS NO RECOMMENDED REPLACEMENT contact our Technical Support Center at 1-888-INTERSIL or www.intersil.com/tsc DATASHEET FN8105 Rev 1.00 February 12, 2007 The Intersil X28C010/X28HT010 is a 128K x 8 EEPROM, fabricated with Intersil's proprietary, high performance, floating gate CMOS technology. Like all Intersil programmable non-volatile memories, the X28C010/X28HT010 is a 5V only device. The X28C010/X28HT010 features the JEDEC approved pin out for byte-wide memories, compatible with industry standard EEPROMs. The X28C010/X28HT010 supports a 256-byte page write operation, effectively providing a 19µs/byte write cycle and enabling the entire memory to be typically written in less than 2.5 seconds.
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