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RC22504A - Sub-100fs Frequency Synthesizer

Datasheet Summary

Description

The RC22504A is a small, low-power timing component designed to be placed immediately adjacent to a PHY, switch, ASIC or FPGA that requires several reference clocks with jitter performance less than 100fs (max).

Features

  • Jitter as low as 64 fs RMS maximum (10kHz to 20MHz).
  • PLL core consists of fractional-feedback Analog PLL (APLL) ○ Operates from a 25MHz to 80MHz crystal or XO ○ APLL frequency independent of input / crystal frequency ○ Operates as a frequency synthesizer or Digitally Controlled Oscillator (DCO) ○ DCO has tuning granularity of < 1ppb.
  • Programmable status output.
  • 4 differential / 8 LVCMOS outputs ○ Any frequency from 10MHz to 1GHz (180MHz for LVCMOS) ○ Programm.

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Datasheet preview – RC22504A

Datasheet Details

Part number RC22504A
Manufacturer Renesas
File Size 2.43 MB
Description Sub-100fs Frequency Synthesizer
Datasheet download datasheet RC22504A Datasheet
Additional preview pages of the RC22504A datasheet.

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Full PDF Text Transcription

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RC22504A FemtoClock®2 Sub-100fs Frequency Synthesizer Datasheet Description The RC22504A is a small, low-power timing component designed to be placed immediately adjacent to a PHY, switch, ASIC or FPGA that requires several reference clocks with jitter performance less than 100fs (max). The RC22504A can act as a frequency synthesizer to locally generate the reference clock or as a DCO for frequency margining or OTN clock applications. The device is a member of Renesas' highperformance FemtoClock2 family.
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