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R7F101GGG - 48-MHz CPU

This page provides the datasheet information for the R7F101GGG, a member of the R7F101G6G 48-MHz CPU family.

Datasheet Summary

Features

  • Ultra-low power consumption technology.
  • VDD = single power supply voltage of 1.6 to 5.5 V.
  • HALT mode.
  • STOP mode.
  • High-speed wakeup from the STOP mode is possible.
  • SNOOZE mode RL78 CPU core.
  • CISC architecture with 3-stage pipeline.
  • The minimum instruction execution time can be changed from high to ultra-low speed.
  • High speed: 0.02083 µs at 48 MHz operation with the high-speed on-chip oscillator clock or the PLL clock.

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Datasheet preview – R7F101GGG

Datasheet Details

Part number R7F101GGG
Manufacturer Renesas
File Size 2.04 MB
Description 48-MHz CPU
Datasheet download datasheet R7F101GGG Datasheet
Additional preview pages of the R7F101GGG datasheet.

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Full PDF Text Transcription

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Datasheet RL78/G24 R01DS0432EJ0110 RENESAS MCU Rev.1.10 Nov 1, 2023 High-performance with 48-MHz CPU operation on true low-power platform, 50-µA/MHz operating current, flexible application accelerator (FAA), enhanced timers and analog functions for motor control, digital power supply, and lighting applications, providing PMBus/SMBus, and DALI-2 communications, from 20 to 64 pins, 1.6- to 5.5-V operation 1. Outline 1.1 Features Ultra-low power consumption technology • VDD = single power supply voltage of 1.6 to 5.5 V • HALT mode • STOP mode • High-speed wakeup from the STOP mode is possible. • SNOOZE mode RL78 CPU core • CISC architecture with 3-stage pipeline • The minimum instruction execution time can be changed from high to ultra-low speed. – High speed: 0.
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