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R5F51406BDFN - 32-bit RX MCU

Download the R5F51406BDFN datasheet PDF. This datasheet also covers the R5F51406ADFN variant, as both devices belong to the same 32-bit rx mcu family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • 32-bit RXv2 CPU core.
  • Maximum operating frequency: 48 MHz Capable of 204 Coremark in operation at 48 MHz.
  • Enhanced DSP instructions: 32-bit multiply-accumulate instructions, and 16-bit multiply-subtract instructions are supported.
  • On-chip FPU: 32-bit single-precision floating point compliant with IEEE-754.
  • On-chip divider that operated at the fastest of two clock cycles.
  • Fast interrupt.
  • CISC Harvard architecture with 5-stage pipeline.
  • Variable-length ins.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (R5F51406ADFN-Renesas.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by Renesas

Part Number Description
R5F51406BDFK 32-bit RX MCU
R5F51406BDFL 32-bit RX MCU
R5F51406BDFM 32-bit RX MCU
R5F51406BDNE 32-bit RX MCU
R5F51406BGFK 32-bit RX MCU

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Datasheet RX140 Group R01DS0379EJ0120 Renesas MCUs Rev.1.20 Nov 22, 2024 48-MHz, 32-bit RX MCUs, on-chip FPU, 204 Coremark, up to 256-KB flash memory, up to 36 pins capacitive touch sensing unit, up to 9 comms channels, 12-bit A/D, D/A, RTC, IEC60730 compliance, 1.8-V to 5.5-V single supply, Encryption functions (optional) Features ■ 32-bit RXv2 CPU core  Maximum operating frequency: 48 MHz Capable of 204 Coremark in operation at 48 MHz  Enhanced DSP instructions: 32-bit multiply-accumulate instructions, and 16-bit multiply-subtract instructions are supported.