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R5F513T3ADFL - 32-MHz 32-bit RX MCU

Download the R5F513T3ADFL datasheet PDF. This datasheet also covers the R5F513T5ADFL variant, as both devices belong to the same 32-mhz 32-bit rx mcu family and are provided as variant models within a single manufacturer datasheet.

General Description

CPU CPU Maximum operating frequency: 32 MHz 32-bit RX CPU Minimum instruction execution time: One instruction per clock cycle Address space: 4-Gbyte linear Register set General purpose: Sixteen 32-bit registers Control: Nine 32-bit registers Accumulator: One 64-bit r

Key Features

  • 32-bit RX CPU core.
  • Max. operating frequency: 32 MHz Capable of 50 DMIPS in operation at 32 MHz.
  • Accumulator handles 64-bit results (for a single instruction) from 32-bit × 32-bit operations.
  • Multiplication and division unit handles 32-bit × 32-bit operations (multiplication instructions take one CPU clock cycle).
  • Built-in FPU: 32-bit single-precision floating point (compliant to IEEE754).
  • Fast interrupt.
  • CISC Harvard architecture with 5-stage pipeline.
  • V.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (R5F513T5ADFL-Renesas.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Datasheet RX13T Group Renesas MCUs R01DS0341EJ0110 Rev.1.10 Mar 16, 2021 32-MHz 32-bit RX MCUs, built-in FPU, 50 DMIPS, power supply 5 V 12-bit ADC (equipped with 3-channel synchronous S/H circuits, programmable gain amplifier × 3 ch, and comparator) 32-MHz PWM (three-phase complementary output × 1 ch), On-chip data flash memory Features ■ 32-bit RX CPU core  Max.