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R5F110NJ - MCU

This page provides the datasheet information for the R5F110NJ, a member of the R5F110MJ MCU family.

Features

  • Ultra-low power consumption technology.
  • VDD = single power supply voltage of 1.6 to 3.6 V.
  • HALT mode.
  • STOP mode.
  • SNOOZE mode RL78 CPU core.
  • CISC architecture with 3-stage pipeline.
  • Minimum instruction execution time: Can be changed from high speed (0.04167 μs: @ 24 MHz operation with high-speed on-chip oscillator clock or PLL clock) to ultra-low speed (30.5 μs: @ 32.768 kHz operation with subsystem clock).
  • Multiply/divide and multipl.

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Datasheet preview – R5F110NJ

Datasheet Details

Part number R5F110NJ
Manufacturer Renesas
File Size 1.49 MB
Description MCU
Datasheet download datasheet R5F110NJ Datasheet
Additional preview pages of the R5F110NJ datasheet.
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Full PDF Text Transcription

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Datasheet RL78/L1C R01DS0192EJ0220 RENESAS MCU Rev.2.20 Dec 28, 2017 Integrated LCD controller/driver, 12-bit resolution A/D Converter, USB 2.0 controller (function), True Low Power Platform (as low as 112.5 μA/MHz, and 0.68 μA for RTC2 + LVD), 1.6 V to 3.6 V operation, 64 to 256 Kbyte Flash, 33 DMIPS at 24 MHz, for All LCD Based Applications 1. OUTLINE 1.1 Features Ultra-low power consumption technology • VDD = single power supply voltage of 1.6 to 3.6 V • HALT mode • STOP mode • SNOOZE mode RL78 CPU core • CISC architecture with 3-stage pipeline • Minimum instruction execution time: Can be changed from high speed (0.04167 μs: @ 24 MHz operation with high-speed on-chip oscillator clock or PLL clock) to ultra-low speed (30.5 μs: @ 32.
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