Full PDF Text Transcription for ISL95811 (Reference)
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ISL95811. For precise diagrams, and layout, please refer to the original PDF.
ISL95811 NOTRRECECOOMMMMENEISNDLDE9DE5D8R1FE0OPLRANCEEWMEDNETS:IGNS I2C Bus, 256 Taps, 5 Bytes General Purpose Memory, Low Noise, Low Power DATASHEET FN6759 Rev 1.00 Octo...
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al Purpose Memory, Low Noise, Low Power DATASHEET FN6759 Rev 1.00 October 6, 2008 Single Digitally Controlled Potentiometer (XDCP™) The ISL95811 integrates a digitally controlled potentiometer (XDCP) and non-volatile memory on a monolithic CMOS integrated circuit. The digitally controlled potentiometer is implemented with a combination of resistor elements and CMOS switches. The position of the wiper is controlled by the user through the I2C bus interface. The potentiometer has an associated volatile Wiper Register (WR) and a non-volatile Initial Value Register (IVR), that can be directly written to and read by the user. T
ISL95811 Datasheet
