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ISL55111 - High Speed MOSFET Driver

Download the ISL55111 datasheet PDF. This datasheet also covers the ISL55110 variant, as both devices belong to the same high speed mosfet driver family and are provided as variant models within a single manufacturer datasheet.

Description

FUNCTION Logic power.

Driver high rail supply.

Ground, return for both VH rail and VDD logic supply.

Features

  • 5V to 12V pulse amplitude.
  • High current drive 3.5A.
  • 6ns minimum pulse width.
  • 1.5ns rise and fall times, 100pF load.
  • Low skew.
  • 3.3V and 5V logic compatible.
  • In-phase (ISL55110) and anti-phase outputs (ISL55111).
  • Small QFN and TSSOP packaging.
  • Low quiescent current.
  • Pb-free (RoHS compliant).

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (ISL55110-Renesas.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number ISL55111
Manufacturer Renesas
File Size 918.76 KB
Description High Speed MOSFET Driver
Datasheet download datasheet ISL55111 Datasheet

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Other Datasheets by Renesas

Part Number Description
ISL55110 High Speed MOSFET Driver
ISL55100A Quad 18V Pin Electronics Driver/Window Comparator
ISL55100B Quad 18V Pin Electronics Driver/Window Comparator
ISL55141 High-Speed 18V CMOS Comparators
ISL55142 High-Speed 18V CMOS Comparators

Full PDF Text Transcription

Click to expand full text
ISL55110, ISL55111 Dual, High Speed MOSFET Driver The ISL55110 and ISL55111 are dual high speed MOSFET drivers intended for applications requiring accurate pulse generation and buffering. Target applications include ultrasound, CCD imaging, piezoelectric distance sensing and clock generation circuits. With a wide output voltage range and low ON-resistance, these devices can drive a variety of resistive and capacitive loads with fast rise and fall times, allowing high-speed operation with low skew, as required in large CCD array imaging applications. The ISL55110, ISL55111 are compatible with 3.3V and 5V logic families and incorporate tightly controlled input thresholds to minimize the effect of input rise time on output pulse width.
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