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CMOS TRIPLE BUS SyncFIFOTM WITH BUS-MATCHING IDT723656
2,048 x 36 x 2
IDT723666
4,096 x 36 x 2
IDT723676
8,192 x 36 x 2
OBSOLETE PARTS
FEATURES
• Serial or parallel programming of partial flags
• Memory storage capacity: IDT723656 – 2,048 x 36 x 2
• Big- or Little-Endian format for word and byte bus sizes • Loopback mode on Port A
IDT723666 – 4,096 x 36 x 2
• Retransmit Capability
IDT723676 – 8,192 x 36 x 2
• Master Reset clears data and configures FIFO, Partial Reset
• Clock frequencies up to 83 MHz (8ns access time) • Two independent FIFOs buffer data between one bidirectional
36-bit port and two unidirectional 18-bit ports (Port C receives
clears data but retains configuration settings • Mailbox bypass registers for each FIFO • Free-running CLKA, CLKB and CLKC may be asy