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ICS557M-01LF - PCI-EXPRESS GEN1 CLOCK SOURCE

Download the ICS557M-01LF datasheet PDF. This datasheet also covers the ICS557-01 variant, as both devices belong to the same pci-express gen1 clock source family and are provided as variant models within a single manufacturer datasheet.

Description

The ICS557-01 is a clock chip designed for use in PCI-Express Cards as a clock source.

It provides a pair of differential outputs at 100 MHz in a small 8-pin SOIC package.

Features

  • Supports PCI-ExpressTM HCSL Outputs 0.7 V current mode differential pair.
  • Supports LVDS Output Levels.
  • Packaged in 8-pin SOIC.
  • RoHS 5 (green) or RoHS 6 (green and lead free) compliant packaging.
  • Operating voltage of 3.3 V.
  • Low power consumption.
  • Input frequency of 25 MHz.
  • Short term jitter 100 ps (peak-to-peak).
  • Output Enable via pin selection.
  • Industrial temperature range available.
  • For PCIe Gen2.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (ICS557-01-Renesas.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number ICS557M-01LF
Manufacturer Renesas
File Size 277.58 KB
Description PCI-EXPRESS GEN1 CLOCK SOURCE
Datasheet download datasheet ICS557M-01LF Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
ICS557-01 PCI-EXPRESS CLOCK SOURCE ICST
ICS557-03 spread spectrum clock generator IDT
ICS557-05A Quad Differential PCI-Express Clock Source ICST
ICS557-06 ONE TO FOUR HCSL CLOCK BUFFER ICST
ICS557-08 2:1 MULTIPLEXER CHIP ICST

Other Datasheets by Renesas

Part Number Description
ICS557MI-01LF PCI-EXPRESS GEN1 CLOCK SOURCE
ICS557-01 PCI-EXPRESS GEN1 CLOCK SOURCE
ICS557-03 spread spectrum clock generator
ICS557-03 2 OUTPUT PCI-EXPRESS GEN1 CLOCK SOURCE
ICS557-05A spread-spectrum clock generator

Full PDF Text Transcription

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PCI-EXPRESS GEN1 CLOCK SOURCE DATASHEET ICS557-01 Description The ICS557-01 is a clock chip designed for use in PCI-Express Cards as a clock source. It provides a pair of differential outputs at 100 MHz in a small 8-pin SOIC package. Using IDT’s patented Phase-Locked Loop (PLL) techniques, the device takes a 25 MHz crystal input and produces HCSL (Host Clock Signal Level) differential outputs at 100 MHz clock frequency. LVDS signal levels can also be supported via an alternative termination scheme. Features • Supports PCI-ExpressTM HCSL Outputs 0.7 V current mode differential pair • Supports LVDS Output Levels • Packaged in 8-pin SOIC • RoHS 5 (green) or RoHS 6 (green and lead free) compliant packaging • Operating voltage of 3.
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