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ICS557GI-06LF - 2 TO 4 DIFFERENTIAL PCIE GEN1 CLOCK MUX

Download the ICS557GI-06LF datasheet PDF. This datasheet also covers the ICS557-06 variant, as both devices belong to the same 2 to 4 differential pcie gen1 clock mux family and are provided as variant models within a single manufacturer datasheet.

Description

The ICS557-06 is a two to four differential clock mux designed for use in PCI-Express applications.

The device selects one of the two differential HCSL input pairs and fans out to four pairs of differential HCSL or LVDS outputs.

Features

  • Packaged in 20-pin TSSOP.
  • Pb (lead) free packaging.
  • Operating voltage of 3.3 V.
  • Low power consumption.
  • Input differential clock of up to 200 MHz.
  • Jitter 60 ps (cycle-to-cycle).
  • Output-to-output skew of 50 ps.
  • Available in industrial temperature range (-40 to +85°C).
  • For PCIe Gen2/3.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (ICS557-06-Renesas.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number ICS557GI-06LF
Manufacturer Renesas
File Size 287.74 KB
Description 2 TO 4 DIFFERENTIAL PCIE GEN1 CLOCK MUX
Datasheet download datasheet ICS557GI-06LF Datasheet

Full PDF Text Transcription

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2 TO 4 DIFFERENTIAL PCIE GEN1 CLOCK MUX DATASHEET ICS557-06 Description The ICS557-06 is a two to four differential clock mux designed for use in PCI-Express applications. The device selects one of the two differential HCSL input pairs and fans out to four pairs of differential HCSL or LVDS outputs. Features • Packaged in 20-pin TSSOP • Pb (lead) free packaging • Operating voltage of 3.
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