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HD74LS257P - Quadruple 2-line-to-1-line Data Selectors/Multiplexers

Download the HD74LS257P datasheet PDF. This datasheet also covers the HD74LS257 variant, as both devices belong to the same quadruple 2-line-to-1-line data selectors/multiplexers family and are provided as variant models within a single manufacturer datasheet.

Features

  • three-state outputs that can interface directly with and drive data lines of bus-organized systems. With all but one of the common outputs disabled (at a high-impedance state) the low impedance of the single enabled output will drive the bus line to a high or low logic level. To minimize the possibility that two outputs will attempt to take a common bus to opposite logic levels, the outputenable circuitry is designed such that the output disable times are shorter than the output enable times.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (HD74LS257-Renesas.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number HD74LS257P
Manufacturer Renesas
File Size 167.17 KB
Description Quadruple 2-line-to-1-line Data Selectors/Multiplexers
Datasheet download datasheet HD74LS257P Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
HD74LS257 Quadruple 2-line-to-1-line Data Selectors/Multiplexers Hitachi Semiconductor
HD74LS251 1 of 8 Data Selectors/Multiplexers Hitachi Semiconductor
HD74LS253 Dual 4-line-to-1-line Data Selectors/Multiplexers Hitachi Semiconductor
HD74LS258 Quadruple 2-line-to-1-line Data Selectors/Multiplexers Hitachi Semiconductor
HD74LS259 8-bit Addressable Latches Hitachi Semiconductor

Other Datasheets by Renesas

Part Number Description
HD74LS257 Quadruple 2-line-to-1-line Data Selectors/Multiplexers
HD74LS251 1 of 8 Data Selector/Multiplexer
HD74LS251P 1 of 8 Data Selector/Multiplexer
HD74LS253 Dual 4-line-to-1-line Data Selectors/Multiplexers
HD74LS253P Dual 4-line-to-1-line Data Selectors/Multiplexers

Full PDF Text Transcription

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HD74LS257 Quadruple 2-line-to-1-line Data Selectors / Multiplexers (with not inverted 3-state outputs) REJ03D0469–0300 Rev.3.00 Jul.15.2005 This multiplexer features three-state outputs that can interface directly with and drive data lines of bus-organized systems. With all but one of the common outputs disabled (at a high-impedance state) the low impedance of the single enabled output will drive the bus line to a high or low logic level. To minimize the possibility that two outputs will attempt to take a common bus to opposite logic levels, the outputenable circuitry is designed such that the output disable times are shorter than the output enable times.
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