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9DML0441 - 2:4 3.3V PCIe Gen1-5 Clock Mux

Datasheet Summary

Description

The 9DML0441 and 9DML0451 devices are 3.3V members of Renesas' Full-Featured PCIe family.

6 Common Clocked (CC), Separate Reference no Spread (SRnS), and Independent Reference (IR) clock architectures.

Features

  • Four 1.
  • 200MHz Low-Power HCSL (LP-HCSL) DIF pairs.
  • 9DML0441 default ZOUT = 100.
  • 9DML0451 default ZOUT = 85.
  • See AN-891 for easy termination to other logic levels Features.
  • Direct connection to 100 (xx41) or 85 (xx51) transmission lines saves up to 16 resistors.
  • 79mW typical power consumption.
  • Spread Spectrum Clocking (SSC) compatible.
  • OE# pins for each output.
  • HCSL-compatible differential inputs.

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Datasheet preview – 9DML0441

Datasheet Details

Part number 9DML0441
Manufacturer Renesas
File Size 628.57 KB
Description 2:4 3.3V PCIe Gen1-5 Clock Mux
Datasheet download datasheet 9DML0441 Datasheet
Additional preview pages of the 9DML0441 datasheet.

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Full PDF Text Transcription

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2:4 3.3V PCIe Gen1–6 Clock Mux 9DML0441 / 9DML0451 DATASHEET Description The 9DML0441 and 9DML0451 devices are 3.3V members of Renesas' Full-Featured PCIe family. They support PCIe Gen1–6 Common Clocked (CC), Separate Reference no Spread (SRnS), and Independent Reference (IR) clock architectures. The parts provide a choice of asynchronous or glitch-free, gapped-clock switching modes, and offer a choice of integrated output terminations for direct connection to 85Ω or 100Ω transmission lines.
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