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8T73S1802 - 1:2 Clock Fanout Buffer and Frequency Divider

Description

The 8T73S1802 is a fully integrated clock fanout buffer and frequency divider.

The input signal is frequency-divided and then fanned out to one differential LVPECL and one LVCMOS output.

Each of the outputs can select its individual divider value from the range of ÷1, ÷2, ÷4 and ÷8.

Features

  • High-performance fanout buffer clock and fanout buffer.
  • Input clock signal is distributed to one LVPECL and one LVCMOS output.
  • Configurable output dividers for both LVPECL and LVCMOS outputs.
  • Supports clock frequencies up to 1000MHz (LVPECL) and up to 200MHz (LVCMOS).
  • Flexible differential input supports LVPECL, LVDS and CML.
  • VBB generator output supports single-ended input signal.

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Datasheet Details

Part number 8T73S1802
Manufacturer Renesas
File Size 1.12 MB
Description 1:2 Clock Fanout Buffer and Frequency Divider
Datasheet download datasheet 8T73S1802 Datasheet

Full PDF Text Transcription

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1:2 Clock Fanout Buffer and Frequency Divider 8T73S1802 Datasheet Description The 8T73S1802 is a fully integrated clock fanout buffer and frequency divider. The input signal is frequency-divided and then fanned out to one differential LVPECL and one LVCMOS output. Each of the outputs can select its individual divider value from the range of ÷1, ÷2, ÷4 and ÷8. Three control inputs EN, SEL0 and SEL1 (3-level logic) are available to select the frequency dividers and the output enable/disable state. The single-ended LVCMOS output is phase-delayed by 650ps to minimize coupling of LVCMOS switching into the differential output during its signal transition. The 8T73S1802 is optimized to deliver very low phase noise clocks.
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