Datasheet4U Logo Datasheet4U.com

70V08L - HIGH-SPEED 3.3V 64K x 8 DUAL-PORT STATIC RAM

Description

The IDT70V08 is a high-speed 64K x 8 Dual-Port Static RAM.

The IDT70V08 is designed to be used as a stand-alone 512K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 16-bitor-more word system.

Features

  • True Dual-Ported memory cells which allow simultaneous access of the same memory location.
  • High-speed access.
  • Commercial: 15ns (max. ).
  • Industrial: 20ns (max. ).
  • Low-power operation.
  • IDT70V08L Active: 550mW (typ. ) Standby: 1mW (typ. ).
  • Dual chip enables allow for depth expansion without external logic.
  • IDT70V08 easily expands data bus width to 16 bits or more using the Master/Slave select when cascading more than one device.
  • M/S = VIH for B.

📥 Download Datasheet

Datasheet Details

Part number 70V08L
Manufacturer Renesas
File Size 332.11 KB
Description HIGH-SPEED 3.3V 64K x 8 DUAL-PORT STATIC RAM
Datasheet download datasheet 70V08L Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
70V24 HIGH-SPEED 3.3V STATIC RAM IDT
70V24L HIGH-SPEED 3.3V STATIC RAM IDT
70V24S HIGH-SPEED 3.3V STATIC RAM IDT
70V25 HIGH-SPEED 3.3V STATIC RAM IDT
70V25L HIGH-SPEED 3.3V STATIC RAM IDT

Other Datasheets by Renesas

Part Number Description
70V05L DUAL-PORT STATIC RAM
70V05S DUAL-PORT STATIC RAM
70V24 HIGH-SPEED 3.3V STATIC RAM
70V24L HIGH-SPEED 3.3V STATIC RAM
70V24S HIGH-SPEED 3.3V STATIC RAM

Full PDF Text Transcription

Click to expand full text
HIGH-SPEED 3.3V 64K x 8 DUAL-PORT STATIC RAM 70V08L Features ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location ◆ High-speed access – Commercial: 15ns (max.) – Industrial: 20ns (max.) ◆ Low-power operation – IDT70V08L Active: 550mW (typ.) Standby: 1mW (typ.) ◆ Dual chip enables allow for depth expansion without external logic ◆ IDT70V08 easily expands data bus width to 16 bits or more using the Master/Slave select when cascading more than one device ◆ M/S = VIH for BUSY output flag on Master, M/S = VIL for BUSY input on Slave ◆ Busy and Interrupt Flags ◆ On-chip port arbitration logic ◆ Full on-chip hardware support of semaphore signaling between ports ◆ Fully asynchronous operation from either port ◆ LVTTL-compatible, single 3.3V (±0.
Published: |