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HD74LV2G240A - Dual Bus Buffer Inverted

Description

The HD74LV2G240A has dual bus buffer inverted with 3

state output in an 8 pin package.

Two inverters are included in one circuit.

Each circuit can be independently controlled by the enable signal 1OE or 2OE, which enables outputs when receiving a low-level signal.

Features

  • The basic gate function is lined up as Renesas uni logic series.
  • Supplied on emboss taping for high-speed automatic mounting.
  • Electrical characteristics equivalent to the HD74LV240A Supply voltage range : 1.65 to 5.5 V Operating temperature range :.
  • 40 to +85°C.
  • All inputs VIH (Max. ) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VO (Max. ) = 5.5 V (@VCC = 0 V, Output : Z).
  • Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5.

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www.DataSheet4U.com HD74LV2G240A Dual Bus Buffer Inverted with 3–state Output REJ03D0102–0400Z (Previous ADE-205-349C (Z)) Rev.4.00 Sep.30.2003 Description The HD74LV2G240A has dual bus buffer inverted with 3–state output in an 8 pin package. Two inverters are included in one circuit. Each circuit can be independently controlled by the enable signal 1OE or 2OE, which enables outputs when receiving a low-level signal. Low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the battery life. Features • The basic gate function is lined up as Renesas uni logic series. • Supplied on emboss taping for high-speed automatic mounting.
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