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HD74LV2G240A
Dual Bus Buffer Inverted with 3–state Output
REJ03D0102–0400Z (Previous ADE-205-349C (Z)) Rev.4.00 Sep.30.2003
Description
The HD74LV2G240A has dual bus buffer inverted with 3–state output in an 8 pin package. Two inverters are included in one circuit. Each circuit can be independently controlled by the enable signal 1OE or 2OE, which enables outputs when receiving a low-level signal. Low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the battery life.
Features
• The basic gate function is lined up as Renesas uni logic series. • Supplied on emboss taping for high-speed automatic mounting.