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HYB18TC1G800BF - 1-Gbit Double-Data-Rate-Two SDRAM

Description

latched at the cross point of differential clocks (CK rising and CK falling).

All I/Os are synchronized with a single ended DQS or differential DQS-DQS pair in a source synchronous fashion.

Features

  • The 1-Gbit Double-Data-Rate-Two SDRAM offers the following key features:.
  • Off-Chip-Driver impedance adjustment (OCD) and On.
  • 1.8 V ± 0.1 V Power Supply 1.8 V ± 0.1 V (SSTL_18) compatible I/O Die-Termination (ODT) for better signal quality.
  • DRAM organizations with 8 and 16 data in/outputs.
  • Auto-Precharge operation for read and write bursts.
  • Double Data Rate architecture: two data transfers per.
  • Auto-Refresh, Self-Refresh and power saving Powe.

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Datasheet Details

Part number HYB18TC1G800BF
Manufacturer Qimonda
File Size 3.54 MB
Description 1-Gbit Double-Data-Rate-Two SDRAM
Datasheet download datasheet HYB18TC1G800BF Datasheet

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Full PDF Text Transcription

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July 2007 HYB18T C1G 80 0 BF HYB18T C1G 16 0 BF 1-Gbit Double-Data-Rate-Two SDRAM DDR2 SDRAM RoHS Compliant Products Internet Data Sheet Rev. 1.21 Free Datasheet http://www.datasheet4u.com/ Internet Data Sheet HYB18TC1G[80/16]0BF 1-Gbit Double-Data-Rate-Two SDRAM HYB18TC1G800BF, HYB18TC1G160BF Revision History: 2007-07, Rev. 1.21 Page All 14 136 Subjects (major changes since last revision) Adapted internet edition Corrected Table 9: Added Ball B2 and B8 Corrected package outline Editorial changes Previous Revision: 2007-03, Rev. 1.1 Previous Revision: 2007-03, Rev. 1.2 We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document.
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