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SAA2022 - Tape formatting and error correction for the DCC system

Description

Performing the tape formatting and error correction functions for DCC applications, the SAA2022 can be used in conjunction with the PASC (SAA2002/SAA2012), tape equalization (SAA2032), read amplifier (TDA1317 or TDA1318) and write amplifier (TDA1316 or TDA1319) circuits to implement a full signal pr

Features

  • Integrated error correction encoder/decoder function with Digital Compact Cassette (DCC) optimized algorithms.
  • Control of capstan servo during recording and after recording by microcontroller.
  • Frequency and phase regulation of capstan servo during playback.
  • Choice of two Dynamic Random Access Memory (DRAM) types operating in page mode.
  • Scratch pad RAM area available to microcontroller in system DRAM.
  • Low power standby mode.
  • I2S inte.

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Other Datasheets by Philips Semiconductors (now NXP Semiconductors)

Part Number Description
SAA2023 Drive processor for DCC systems
SAA2003 Stereo filter and codec
SAA2013 Adaptive allocation and scaling for PASC coding in DCC systems
SAA2032 Digital equalization for the tape drive processing of the DCC system
SAA2500 MPEG Audio Source Decoder

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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INTEGRATED CIRCUITS DATA SHEET SAA2022 Tape formatting and error correction for the DCC system Product specification Supersedes data of February 1993 File under Integrated Circuits, Miscellaneous February 1994 Philips Semiconductors Philips Semiconductors Product specification Tape formatting and error correction for the DCC system FEATURES • Integrated error correction encoder/decoder function with Digital Compact Cassette (DCC) optimized algorithms • Control of capstan servo during recording and after recording by microcontroller • Frequency and phase regulation of capstan servo during playback • Choice of two Dynamic Random Access Memory (DRAM) types operating in page mode • Scratch pad RAM area available to microcontroller in system DRAM • Low power standby mode • I2S interface • M
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