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PI6CEQ20200 - Gen2 / Gen3 Buffer

Description

The PI6CEQ20200 is a high performance PCIe Gen2/ Gen3 zero delay buffer with two HCSL outputs.

Features

  • ÎÎPCIe Gen2/ Gen3.
  • compliant clock buffer/ZDB.
  • Gen3 performance only available in Commercial temp ÎÎInternal equalization for better signal integrity ÎÎ2 HCSL outputs ÎÎDual PLL bandwidth for SSC tracking ÎÎCycle-to-Cycle Jitter : 40ps (typ) ÎÎOutput-to-Output Skew.

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Datasheet Details

Part number PI6CEQ20200
Manufacturer Pericom Semiconductor
File Size 480.94 KB
Description Gen2 / Gen3 Buffer
Datasheet download datasheet PI6CEQ20200 Datasheet

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Full PDF Text Transcription

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Features ÎÎPCIe Gen2/ Gen3* compliant clock buffer/ZDB * Gen3 performance only available in Commercial temp ÎÎInternal equalization for better signal integrity ÎÎ2 HCSL outputs ÎÎDual PLL bandwidth for SSC tracking ÎÎCycle-to-Cycle Jitter : 40ps (typ) ÎÎOutput-to-Output Skew <10ps ÎÎ3.3V supply voltage ÎÎTSSOP-20 packages Applications ÎÎServers ÎÎEmbedded computing systems ÎÎNetworking systems Block Diagram PI6CEQ20200 PCIe® Gen2 / Gen3 Buffer Description The PI6CEQ20200 is a high performance PCIe Gen2/ Gen3 zero delay buffer with two HCSL outputs. Pericom’s proprietary equalization technique used in this device improves signal integrity and makes this device suitable for PCIe Gen2/ Gen3 applications even when the input from the main clock has to travel a long distance.
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