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PI6CV857L - PLL Clock Driver

Description

PI6CV857L PLL clock device is developed for registered DDR DIMM applications This PLL Clock Buffer is designed for 2.5 VDDQ and 2.5V AVDD operation and differential data input and output levels.

Features

  • • PLL clock distribution optimized for Double Data Rate SDRAM.

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Datasheet Details

Part number PI6CV857L
Manufacturer Pericom Semiconductor Corporation
File Size 328.30 KB
Description PLL Clock Driver
Datasheet download datasheet PI6CV857L Datasheet

Full PDF Text Transcription

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12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PI6CV857L PLL Clock Driver for 2.5V DDR-SDRAM Memory Product Features • PLL clock distribution optimized for Double Data Rate SDRAM applications. • Distributes one differential clock input pair to ten differential clock output pairs. • Inputs (CLK,CLK) and (FBIN,FBIN): SSTL_2 • Input PWRDWN: LVCMOS www.DataSheet4U.com • Outputs (Yx, Yx), (FBOUT, FBOUT): SSTL_2 • External feedback pins (FBIN,FBIN) are used to synchronize the outputs to the clock input. • Operates at AVDD = 2.
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