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PJDLC12 - ULTRA LOW CAPACITANCE DUAL TRANSIET VOLTAGE SUPPRESSOR

Download the PJDLC12 datasheet PDF. This datasheet also covers the PJDLC03 variant, as both devices belong to the same ultra low capacitance dual transiet voltage suppressor family and are provided as variant models within a single manufacturer datasheet.

Features

  • Maximum capacitance @ 0 Vdc Bias of 1.2 pF between terminals 1-3 or terminals 2-3.
  • IEC61000-4-2 esd 15kV Air, 8kV contact compliance.
  • In compliance with EU RoHS 2002/95/EC directives 0.056(1.40) 0.047(1.20) 0.079(2.00) 0.070(1.80).

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (PJDLC03_PanJitInternational.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

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Other Datasheets by PanJit Semiconductor

Part Number Description
PJDLC15 ULTRA LOW CAPACITANCE DUAL TRANSIET VOLTAGE SUPPRESSOR
PJDLC03 ULTRA LOW CAPACITANCE DUAL TRANSIET VOLTAGE SUPPRESSOR
PJDLC05 ULTRA LOW CAPACITANCE DUAL TRANSIET VOLTAGE SUPPRESSOR
PJDLC05C-02 ULTRA LOW CAPACITANCE DUAL TRANSIET VOLTAGE SUPPRESSOR
PJDLC05C-03 ULTRA LOW CAPACITANCE DUAL TRANSIET VOLTAGE SUPPRESSOR

Full PDF Text Transcription

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PJDLC03~PJDLC24 VOLTAGE 3.3 to 24 Volts POWER 400 Watts 0.006(0.15)MIN. 0.008(0.20) 0.003(0.08) 0.044(1.10) 0.035(0.90) 0.020(0.50) 0.013(0.35) ULTRA LOW CAPACITANCE DUAL TRANSIET VOLTAGE SUPPRESSOR FOR HIGH SPEED DATA LINES This transient overvoltage suppressor is intended to prodect sensitive equipment againset electrostatic discharge events as well to offer a minmum lnsertion loss in data transmission lines in communications ports used in portable consumer, computing and networking applicatons. This dual transient voltage suppressor comes in a single SOT-23, offering borard space reduction, where the application requires it. 0.120(3.04) 0.110(2.80) FEATURES • Maximum capacitance @ 0 Vdc Bias of 1.
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