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SCV8163 - Ultra-Low Noise and High PSRR LDO Regulator

Datasheet Summary

Description

Pin No.

Regulated output voltage.

The output should be bypassed with small 1 mF ceramic capacitor.

Features

  • Operating Input Voltage Range: 2.2 V to 5.5 V.
  • Available in Fixed Voltage Option: 1.2 V to 5.3 V.
  • ±2% Accuracy Over Load/Temperature.
  • Ultra Low Quiescent Current Typ. 12 mA.
  • Standby Current: Typ. 0.1 mA.
  • Very Low Dropout: 80 mV at 250 mA @ 3.3 V.
  • Ultra High PSRR: Typ. 92 dB at 20 mA, f = 1 kHz.
  • Ultra Low Noise: 6.5 mVRMS.
  • Stable with a 1 mF Small Case Size Ceramic Capacitors.
  • Available in XDFN4 1 mm x 1 mm.

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Datasheet preview – SCV8163

Datasheet Details

Part number SCV8163
Manufacturer ON Semiconductor
File Size 1.01 MB
Description Ultra-Low Noise and High PSRR LDO Regulator
Datasheet download datasheet SCV8163 Datasheet
Additional preview pages of the SCV8163 datasheet.

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Full PDF Text Transcription

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DATA SHEET www.onsemi.com 250 mA, Ultra-Low Noise and High PSRR LDO Regulator for RF and Analog Circuits SCV8163 The SCV8163 is a next generation of high PSRR, ultra−low noise LDO capable of supplying 250 mA output current. Designed to meet the requirements of RF and sensitive analog circuits, the SCV8163 device provides ultra−low noise, high PSRR and low quiescent current. The device also offer excellent load/line transients. The SCV8163 is designed to work with a 1 mF input and a 1 mF output ceramic capacitor. It is available in XDFN4 0.65P, 1 mm x 1 mm package. Features • Operating Input Voltage Range: 2.2 V to 5.5 V • Available in Fixed Voltage Option: 1.2 V to 5.3 V • ±2% Accuracy Over Load/Temperature • Ultra Low Quiescent Current Typ. 12 mA • Standby Current: Typ. 0.
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