P3P85R01A - 75 MHz to 200 MHz LVCMOS TIMING SAFE Peak EMI Reduction Device

Product Overview

ON Semiconductor

Datasheet Details

Part number	P3P85R01A
Manufacturer	ON Semiconductor
File Size	135.57 KB
Description	75 MHz to 200 MHz LVCMOS TIMING SAFE Peak EMI Reduction Device
Datasheet	P3P85R01A Datasheet
Additional preview pages of the P3P85R01A datasheet.

Product details

Description

TIMING SAFE Peak EMI reduction device.

TIMING SAFE technology is the ability to modulate a clock source with Spread Spectrum technology and maintain synchronization with any associated data path.

Refer to Figure 3.

Features

1x, LVCMOS Peak EMI Reduction.
Input Frequency Range: 75 MHz.
200 MHz.
Output Frequency Range: 75 MHz.
200 MHz.
Analog Deviation Selection.
Analog Input.
Output Delay Control.
Analog PLL Output Delay Control.
Low Cycle.
to.
Cycle Jitter.
Supply Voltage: 3.3 V ± 0.3 V.
8 pin, WDFN, 2 mm x 2 mm (TDFN) Package.
Operating Temperature Range: 0°C to +70°C.
These De.

📁 Similar Datasheet

P3P4GF4BLF - 4G Bits Die DDRIII SDRAM (Deutron Electronics)

Other Datasheets by ON Semiconductor

P3P8163A - LVCMOS Spread Spectrum Peak EMI Reduction
P3P8203A - General Purpose Peak EMI Reduction Device
P3P8220A - General Purpose Peak EMI Reduction IC
P3P8220AH - General Purpose Peak EMI Reduction IC
P3P622S01J - Peak EMI Reduction IC
P3P623S00B - Peak EMI Reduction IC

Published: Jan 16, 2016 |